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Products & Services -
Mobius
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Wednesday, 30 July 2008 14:34 |
ESL for Productivity and Quality Improvement
At the Electronic System Level (ESL) engineers design and verify systems using abstract models, concentrating their efforts on system architecture and algorithms rather than on low-level Verilog/VHDL design implementations. The higher abstraction level of ESL design promises superior, more cost effective desgin solutions and shorter design times.
Why not Verilog/VHDL? SystemC? C?
While Verilog/VHDL results in high-quality synthesis, unfortunately they do not offer the high-level abstraction needed for rapid development, increased productivity, and higher quality.
SystemC is a useful simulation tool with a higher abstraction, but unfortunately it is not suited for high-quality hardware synthesis.
Many suggest that C-based ESL design is particularly compelling since engineers are already familiar with the C language, and that many existing C programs can be re-implemented as hardware. Unfortunately this is often impossible! Image a hypothetical push-button "brilliant compiler" that can convert any sequential C into efficient parallel hardware. What does the user do if the resulting hardware is slightly too big or too slow? Does he somehow modify the compiler? Does he experiment specifying the type and order of multiple compiler pragmas? If the user must dramatically re-write the source to obtain an efficient high-performance hardware implementation, then there is little advantage to using existing source.
Introducing Mobius
As a result, there is a need for efficient ESL that provides a high-abstraction level and also generates efficient hardware. We created Mobius, a tiny domain-specific multi-threaded language, to be very easy to learn and revolutionize design productivity.
Mobius combines a high-abstraction level and low-level bit control with proven high-quality synthesis results.
Rapid Development
It is much faster to develop algorithms with Mobius than traditional tools. Mobius source code is typically 15x shorter than equivalent Verilog, VHDL or SystemC, resulting in faster code/test/debug cycles.
The Mobius simulator uses transaction level modeling resulting in a 100x speedup compared to behavioral Verilog or VHDL simulations.
Using the Mobius high-level language helps the user make fewer logical design errors, resulting in higher quality results.
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Last Updated ( Monday, 08 September 2008 13:41 )
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FPGA Rapid Development
